What is the purpose of minimum area design rules

[p_shinde]

tapping a latch

hi,

can any industry person tell what layers are this P tap/ N tap consists of and how is it shown connected in layout.

as in our diploma we used to create a N tap for p xixtor and would connect it to Vdd, is it same..

also let me know if any one has more to say on this topic..

thanks in advance,
Prasad

 

[jcchan]

Re: Tapping for Latch up?

The easy way to check latch up path is p(vdd)-n-p-n(gnd).