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I have a question regarding power analysis. I developed a new design (VHDL-based) and want to do power analysis (dynamic and static) for various technologies such as 0.18u and 65nm technology.
My question is :
Is there any power analysis tool that can do this job. I mean you can input VHDL and set your working conditions and activity rates and the tool generates complete power analysis reports like what we do in X-power for X!l!nx FPGAs?
The problem here is that RTL does not consume power, real cells do. There is absolutely no way to tell how many gates your RTL will synthesize to, so there is no way do power analysis that yields any useful results.
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