What is the model for loop delay in continuous delta sigma?

[ree]

discrete delta sigma

hello,

i want to ask about the excess loop delay in continuous time delta sigma ,
i know how can see it's effect on the stability of the modulator by using matlab,
but what's the model for it ?

thanks

 

[tsb_nph]

continuous delta sigma

hello,

i want to ask about the excess loop delay in continuous time delta sigma ,
i know how can see it's effect on the stability of the modulator by using matlab,
but what's the model for it ?

thanks

This paper discusses how to model excess loop delay effects in continuous time sigma delta modulators.


Excess loop delay in continuous-time delta-sigma modulators

Cherry, J.A. Snelgrove, W.M.
Dept. of Electron., Carleton Univ., Ottawa, Ont. , Canada;

This paper appears in: Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on [see also Circuits and Systems II: Express Briefs, IEEE Transactions on]
Publication Date: April 1999
Volume: 46 , Issue: 4
On page(s): 376 - 389



This thesis by the same author discusses excess loop delay and other issues in continuous time sigma-delta ADC's.

 

[ree]

convert discrete time to continuous time

hello,

i want to ask about the excess loop delay in continuous time delta sigma ,
i know how can see it's effect on the stability of the modulator by using matlab,
but what's the model for it ?

thanks

This paper discusses how to model excess loop delay effects in continuous time sigma delta modulators.


Excess loop delay in continuous-time delta-sigma modulators

Cherry, J.A. Snelgrove, W.M.
Dept. of Electron., Carleton Univ., Ottawa, Ont. , Canada;

This paper appears in: Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on [see also Circuits and Systems II: Express Briefs, IEEE Transactions on]
Publication Date: April 1999
Volume: 46 , Issue: 4
On page(s): 376 - 389

This thesis by the same author discusses excess loop delay and other issues in continuous time sigma-delta ADC's.

h**p://

hello,

i know this paper and this book ,
but Cherry in both of them transfer the continuous to discrete and then comes back to continuous , what i am asking about is there's any other way to model the excess delay without all this loop (to model it in the continuous direct without the need to transfer it to discrete )

thanks

 

[tsb_nph]

continuous delta sigma

hello,

i know this paper and this book ,
but Cherry in both of them transfer the continuous to discrete and then comes back to continuous , what i am asking about is there's any other way to model the excess delay without all this loop (to model it in the continuous direct without the need to transfer it to discrete )

thanks

Your question suggests that you don't understand the reason to go between continuous and discrete time model.

In a switched capacitor, every block works in the discrete time domain. The signal is sampled at the input of the SC filter, so in effect, the filter, comparator and DAC are all operating in discrete time domain.
In contrast, a continuous time sigma-delta is a true mixed-domain system - only the comparator operates in discrete time domain. The filter is in continuous time domain and since the DAC feeds current in continuous time mode to the filter, it also operates in continuous time domain, though the input to it is in discrete time domain.
When you want to analyze this mixed-domain system, where some blocks treat the time as continuous mode and others treat it as discrete mode, the only correct way to analyze it is to convert everything to discrete mode or everyting to continuous mode. Since the output of the ADC is in discrete time mode (digital bit stream), it makes sense to convert all blocks to discrete time mode and analyze it. You can convert everything to continuous time mode and analyze it, but it wouldn't give you much insight.

What insight do you think you can get when you model everything in continuous time domain, keeping in mind that you are interested in a digital bit stream (discrete time) output?

 

[ree]

Re: continuous delta sigma

Your question suggests that you don't understand the reason to go between continuous and discrete time model.

In a switched capacitor, every block works in the discrete time domain. The signal is sampled at the input of the SC filter, so in effect, the filter, comparator and DAC are all operating in discrete time domain.
In contrast, a continuous time sigma-delta is a true mixed-domain system - only the comparator operates in discrete time domain. The filter is in continuous time domain and since the DAC feeds current in continuous time mode to the filter, it also operates in continuous time domain, though the input to it is in discrete time domain.
When you want to analyze this mixed-domain system, where some blocks treat the time as continuous mode and others treat it as discrete mode, the only correct way to analyze it is to convert everything to discrete mode or everyting to continuous mode. Since the output of the ADC is in discrete time mode (digital bit stream), it makes sense to convert all blocks to discrete time mode and analyze it. You can convert everything to continuous time mode and analyze it, but it wouldn't give you much insight.

What insight do you think you can get when you model everything in continuous time domain, keeping in mind that you are interested in a digital bit stream (discrete time) output?

if i modelled the nonidealities in the continuous filter
and i wrote a code that describe the excess loop delay
is it rigth if i connected them to each other?and how i can take the transfer function after adding the filter nonidealities to add to it the effect of the excess loop delay instead of adding it to the ideal one? , i hope i am clear

 

[ree]

Re: continuous delta sigma

any help??

 

[topairborne]

Re: continuous delta sigma

The following thesis may be helpful for you