what is PLI, how can i use it?

[gogogo]

what is PLI, how can i use it?did somebody remmend some books describing it in detail?

 

[IanP]

You can start here:
**broken link removed**
(plenty of PLI links available)

 

[stormwolf]

PLI are program language interface , which are use in verilog , you can see IEEE verilog stand about it.

 

[spauls]

Better read
" Principles of Verilog PLI design " by sanjit k mitra.

 

[xuxia]

I think it is simple.the PLI is base on c/c++,if you are familar with the language,you can develop one PLI application quickly.because the coding style is fixed

 

[gogogo]

how can i get "Principles of Verilog PLI design " by sanjit k mitra???

Added after 6 seconds:

where can i get "Principles of Verilog PLI design " by sanjit k mitra???

 

[funzero]

sutherland book "PLI handbook " is also a good choice.

 

[tut]

http://www.chris.spear.net/pli/default.htm
http://www.geocities.com/avidan_e/pli_tutorial.htm

tut..

 

[xiaolongbao]

is pli widely used during verification?

 

[jas_bakshi]

Hi

PLI = Programming Language Interface.


The advantages of PLI is it makes the verification faster.Moreover all the system tasks are a part of PLI initiative.So we can write our own system tasks which are know as utility or access routines.

 

[jimjim2k]

You can start here:
h**p://home.nycap.rr.com/pflass/pli.htm
(plenty of PLI links available)

Hi

I am sorry to be negative,
BUT

PL/I is different from PLI. The former is a stand-alone programming language as well the later is an extension to HDL languages like verilog.

The Address you mentioned is not related in HDL and verilog concepts of PLI.


tnx

 

[spauls]

PLI is calling external language C/C++ from Verilog .
it is very efficient in Chip Verification.

 

[Memphis]

Does anyone use verilog pli for perl?? Usually I use perl to write some scripts for verilog code. I don't know how much I can do using perl in verilog pli....Can anyone tell me ??

 

[quake]

I've also heard that System Verilog has some superior aspects than Verilog+Pli, can anyone who realy knows this explains why? Is it faster? more flexable? need less coding?
since they said that PLI can be repalced by System Verilog.

 

[zhangpengyu]

It's a interface in verilog to use c ,you could see the verilog ieee ,or the manual of simulator(such as vcs)

 

[zwj_seu]

program language interface ,using c in verilog.

 

[zysmith]

PLI , programming language interface.
simply speaking , verilog can call a function written by C/C++ with PLI

 

[niuniu]

read cadence NC document and you will find the detail on how to write PLI. Now you can co-sim systemc and verilog. so you do not really need PLI.