What is Counter overflowing? overflow implicitly, explicitly

[deepu_s_s]

counter overflow

Hello,

What is Counter overflowing. And how can we make a counter to overflow implicitly or explicitly..

 

[sau_sol]

Re: counter overflow

counter is similar to timer
the timer overflows when it reaches its max limit i.e. for 8 bit 0xFF and 16 bit 0xFFFF
the only difference between two is the clock
the timer takes its clock from the controller
and the counter takes its clock from outside (the counter pin)
so you can do everything with the counter that you are able to do with timer (except PWM)

 

[deepu_s_s]

counter overflow

Hi,
Thanks for the reply man. So Let us suppose the clock freq for the counter is 60 Mhz and if we want the counter to get overflow for every 125ms, then what should be the width of the counter?

 

[sau_sol]

Re: counter overflow

Simple

your freq is 60MHz i.e. time of 1 cycle is 1/60MHz = 0.0167 us or 16.7 ns

and your desired time is 125 ms t
then with a 16 bit timer you can get a maximum delay of 1.094 ms
so generate an interrupt of 1 ms by loading a value 59885 i.e. 0xE9ED

and in the interrupt routine increment a variable and compare it with 125
so when it compares with 125 you will get an approximate delay of 125ms

and if you require exact delay of 125 ms then you have to consider the cycles used in the ISR of timer...

 

[koolslash]

Re: counter overflow

What if we have to reset a counter after 1sec.
(actually wanted to counter no. of pulses in 1sec)

 

[sau_sol]

Re: counter overflow

What if we have to reset a counter after 1sec.
(actually wanted to counter no. of pulses in 1sec)

not understand please explain in more detail

 

[koolslash]

Re: counter overflow

I want to count number of pulses in 1sec.
and then reset the counter.

 

[sivarajm]

Re: counter overflow

hi sau_sol,

1) What will overflow? when the counter reaches maximum limit time ie for 8 bit 0xFF for 16bit 0xFFFF
2) what will happen beyand that.
3) whats the disadvantages and advantages of counter overflow?

 

[sau_sol]

Re: counter overflow

I want to count number of pulses in 1sec.
and then reset the counter.

which pulses??
if you want to count internal pulses no need to count you can calculate it using the crystal frequency.
and for counting external pulses use another timer as an external counter and one as timer to get the time of 1sec.

1) What will overflow? when the counter reaches maximum limit time ie for 8 bit 0xFF for 16bit 0xFFFF
2) what will happen beyand that.
3) whats the disadvantages and advantages of counter overflow?

1) overflow means the buffer reached at its limit
i.e for 8 bit maximum is 0xFF
and overflow means 0xFF + 0x01
this will result in setting the overflow flag of that timer = 1 and the register will be loaded as 0x00
similarly for 16 bit timer also but the counts will be more in the case of 16 bit counter

2) after that if you have enabled the overflow interrupt the program will enter in that interrupt routine
or you can check the overflow flag of that timer

3) the advantages and disadvantages will depends on the program you are using
the advantage is that you can get a specific count delay using the timer

and disadvantage is that if you want to count more than 16 bit you cant

 

[deepu_s_s]

counter overflow

Hi Sau_sol,

As u said for 125 ms count, the width of the counter is 16 bit.

So, for 16 bit counter, the Max value is 65536 and at that point the generated delay is 1.094 ms

So for 125 ms delay generation, the counter should complete almost 125 times rotation.

So can't we take a 23 bit counter instead of 16 bit couner? Wat will happend if we take 23 bit instead of 16 bit?

I guess the only reason would be the hardware issue. More hardware will be required. Is that right?

Please correct If I went wrong somewhere

Added after 4 minutes:

And how can we reset the counter overflow flag? Does it go to reset position as like of normal counters?

 

[sau_sol]

Re: counter overflow

the more number of bits you required the more complex will be the hardware design
now a days some of the ARM processors comes with a 32bit timer

so increasing the bits will increase the complexity
and the timer is simply a adder circuit which adds at the clock tick and the overflow flag is the carry generated out of the MSB
so for clearing it write a 0 to it


another solution for this problem is to use a prescalar for the clock
i.e. clock divider circuit
so instead of 60MHz you can supply a less frequency clock to the timer
then you can generate 125ms out of 16 bit only