Jun 1, 2009 #1 L L Varalakshmi Junior Member level 1 Joined May 28, 2009 Messages 15 Helped 2 Reputation 4 Reaction score 0 Trophy points 1,281 Activity points 1,363 What is coresize(tiles)? Hi, I am new to this FPGA and VHDl. I came across the word tiles(coresize) while going through some document. Ex: It is given like Tile count is 241 for CoreABC(from Actel). Can anyone tell me what "Tiles" is? Any units for this, like we have have bytes for memory?? Thanks in advance.
What is coresize(tiles)? Hi, I am new to this FPGA and VHDl. I came across the word tiles(coresize) while going through some document. Ex: It is given like Tile count is 241 for CoreABC(from Actel). Can anyone tell me what "Tiles" is? Any units for this, like we have have bytes for memory?? Thanks in advance.
Jun 9, 2009 #2 M manoman Banned Joined Apr 15, 2009 Messages 7 Helped 1 Reputation 2 Reaction score 0 Trophy points 1,281 Activity points 0 Re: What is coresize(tiles)? A tile is in Actel nomenclature the elementary cell, it can be configured as a FF or a generic 3 input 2 output logic function. Hope this helps. you can refer to a generic datasheet of any Actel flash device to see how a Tile is composed. Regards
Re: What is coresize(tiles)? A tile is in Actel nomenclature the elementary cell, it can be configured as a FF or a generic 3 input 2 output logic function. Hope this helps. you can refer to a generic datasheet of any Actel flash device to see how a Tile is composed. Regards
Jun 10, 2009 #3 L L Varalakshmi Junior Member level 1 Joined May 28, 2009 Messages 15 Helped 2 Reputation 4 Reaction score 0 Trophy points 1,281 Activity points 1,363 Re: What is coresize(tiles)? Thank you....I have gone throungh the documents...Helped me a lot