Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

what is cell delay?and cell delay depends upon what paramets

Status
Not open for further replies.

vamsi_addagada

Full Member level 2
Joined
Jul 5, 2007
Messages
132
Helped
6
Reputation
12
Reaction score
3
Trophy points
1,298
Location
bangalore
Activity points
2,071
net delay and cell delay

what is cell delay?and cell delay depends upon what parameters
 

sekapr

Advanced Member level 4
Joined
Jul 27, 2006
Messages
100
Helped
9
Reputation
18
Reaction score
4
Trophy points
1,298
Activity points
1,680
Re: what is cell delay?and cell delay depends upon what para

cell delay - Any logic cell is a combination of RC networks. A signal passing through a RC network will get delayed. Cell delay is a function of output loading and input slew rate
 

lakshman.ar

Member level 5
Joined
Nov 29, 2006
Messages
88
Helped
12
Reputation
24
Reaction score
4
Trophy points
1,288
Location
Bangalore
Activity points
1,849
As mentioned above ...

the cell delay depends on
1) input transition ( input slew rate)
2) output load

the cell delay is the min delay after which the output changes its state accg to the input !!
 

shiv_emf

Advanced Member level 2
Joined
Aug 31, 2005
Messages
605
Helped
22
Reputation
44
Reaction score
6
Trophy points
1,298
Activity points
4,106
charing and discharging time of capacitor or load :) ..
rc time constant.

is it applicable to all cells? ( think about it )
 

praneshcn

Member level 5
Joined
Aug 23, 2007
Messages
90
Helped
2
Reputation
4
Reaction score
2
Trophy points
1,288
Activity points
1,899
Re: what is cell delay?and cell delay depends upon what para

i think cell delay is due to the switching of the transistors in the cell. how does the loading of the cell determine the cell delay. Could anyone answer the query.

thank you.
 

chinnisunny

Junior Member level 3
Joined
Apr 18, 2007
Messages
25
Helped
2
Reputation
4
Reaction score
1
Trophy points
1,283
Activity points
1,427
Re: what is cell delay?and cell delay depends upon what para

Hi,

As per i know

Total delay or path delay = Cell delay + Net delay

“Net Delay” refers to the total time needed to charge or discharge all the
parasitics of a given net

Total net parasitics are affected by

net length
net fanout
more...

Cell delay

The delay of a cell is affected by:

The input transition time (or slew rate)
The total load “seen” by the output transistors
Net capacitance and “downstream” pin capacitances
These will affect how quickly the input and output
transistors can “switch”.

Hope it helps.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Top