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What is a stage ratio and how it's divided in each stage?

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Stage Ratio

I am not sure this is it, but it might be the ratio of capacitance driven by a cell to the capacitance at its input. This is also known as electrical fanout (as oposed to logical fanout, which is just the number of gates driven). Rule of thumb is to make this number around 4-5.

Added after 22 seconds:

Hey Kumar, are you just an AMD CPU lover or do you work at AMD?
 

Re: Stage Ratio

This is somewt related to logical effort so try to read logical effort first bfore going to this topic ok
and the material for logical effort is available in this forum so try to find out...
bye take care
 

Re: Stage Ratio

Please refer to the attached doc...this gives a detailed explanation of logical efforts and stage ratios
 
Re: Stage Ratio

In a buffer with gate cap is Cg, and intrinsic cap at drain is Cd the stage ratio is defined as (Cd/Cg).
This term is used to select optimal gate size.
e.g. sometimes it is required to drive a large load with chain of buffers, stage ratio in this case should be 2-3 :D
 

Re: Stage Ratio

hi all where we can find this stage ratio.
and how it helps in the design.
and how to chnge this value.
and what is the criteria to change this value.
thanku
 

Re: Stage Ratio

Hi sizzler

You can get basic definition of Stage ratio in any of CMOS basic book. One I remember is
'Principal of CMOS VLSI design' by Weste & Eshraghian

But actual use of stage ratio in gate size optimization is much more complex.....
 

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