eexuke
Full Member level 4
Dear experts,
Currently when I am comparing on-chip SRAM size (0.18um,UMC),I found a weird result:
Single-port SRAM:4k*16,area 0.38um^2,power 167 uW/MHz
Dual-port SRAM :4k*16,area 0.91um^2,power 79 uW/MHz/port
The dual-port SRAM has two separate ports which can be configured as two simultaneously read, two simultaneously write, and one read one write.
The question is:why the power consumption of dual-port SRAM is smaller even if its chip area is nearly 3 times than single-port?
What dominates the area and power in single-port SRAM and in dual-port SRAM?
Thanks in advance!
Currently when I am comparing on-chip SRAM size (0.18um,UMC),I found a weird result:
Single-port SRAM:4k*16,area 0.38um^2,power 167 uW/MHz
Dual-port SRAM :4k*16,area 0.91um^2,power 79 uW/MHz/port
The dual-port SRAM has two separate ports which can be configured as two simultaneously read, two simultaneously write, and one read one write.
The question is:why the power consumption of dual-port SRAM is smaller even if its chip area is nearly 3 times than single-port?
What dominates the area and power in single-port SRAM and in dual-port SRAM?
Thanks in advance!