warning in the RTL compiler while executing "set_driving_cell"

[srini.pes]

Respected all...........
i am mentioning the driving cell capability for a particular output port 'f'.
i have mentioned like this
here my design name was OFDM

dc::set_driving_cell -lib_cell BUF1 -library fsa0m_a_generic_core_bc -pin I -input_transition_rise 0.1 [dc::get_ports {designs/OFDM/ports_out/f}]


Warning : Could not find requested search value. [SDC-208] [get_ports]
: The 'get_ports' command cannot find any ports named 'designs\/OFDM\/ports_out\/f'.
Error : A required object parameter could not be found. [TUI-61] [parse_options]
: An object of type 'port' named '' could not be found.



please clarify it......
Thanking you all...............

 

[girishbabu123]

set driving cell is used to constrain unit ports
. please chock it cam be used on ooutput ports ,

 

[girishbabu123]

There is a typo . This constraint is used for input ports . Not output ports.
Usually set_load constraints are used on O/P ports

 

[VLSI_Designer]

Hi Srini,

Typical set_driving_cell syntax is as below
set_driving_cell –lib_cell FD1 –pin Q [all_inputs]

What the above command really means?

The Above Command implies that all the input ports of the design have the input capacitance value equal to the o/p load of the Flop.

Above syntax says,
Q is an o/p pin of the lib_cell FD1, which is driving all the inputs [ all_inputs]

Hope it helps ...

 

[wsong0210]

1. set driving cell is used for input ports not output ports.
2. you can use get_ports command alone to see whether the target port can be found
3. set driving cell is used for the top-level port of your design instead of a hierarchical port of a sub-design (which is normally called pin)