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[SOLVED] Verilog / Simulink Cosimulation??

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vex_helix

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tx rx verilog

Hi,

I designed a Viterbi decoder in Verilog and need a testbench to verify its functionality. I really don't want to create testbenches in verilog. I read about the link for modelsim for matlab/simulink but will that be sufficient to check funtionality and find BER (is it a bit-true verification? or just a behavioural verification)? This is what I am trying to do: (binary generator->encoder->modulator->AWGN->demodulator-> [Verilog decoder] -> [Tx/Rx BER calculator]->display)

Thx for the help,
Wasay
 

anant

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simulink verilog

if ur simulations gives u expected BER then u are done.
u can use simple convolution encoder + AWGN and feed the output to viterbi.
 

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