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C , VERILOG, VHDL.

C , VERILOG, VHDL.
C

C , VERILOG, VHDL.

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C , VERILOG, VHDL.

Verilog code to generate a pulse from one clock domain to another clock domain.

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sitesh

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Hello friends,

I want to know about how to write verilog code to generate a pulse from one clock domain to another clock domain.
1. First is operating at 50MHZ frequency.
2. Second is operating at 100MHZ frequency.
 

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