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Verilog-AMS transition Filter

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vleam13

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Hi,

I have question on veriloga code.

For transition filter, how can I create output signal with defferent rising edge delay and falling edge delay?
The problem now is transition command cannot used in if-else statement.

Example:
V(out) <+ transition(Vout, Td, Tr, Tf) ;
I need different Td for rising and falling edge.

Thanks.

regards.
 

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