VCO simulation question

[haadi20]

vco cross coupled pair

I am trying to simulate a cross coupled VCO....however Cadence shows some strange warnings....
"M0: Vgd has exceeded the oxide breakdown voltage of `vbox' = 2.6 V"

Maybe this is because the amplitude of the resulting oscillation is close to 3V....whereas i expect it to be limited by the VDD which is 1.2V.....See the second figure for the PSS warning and resulting PSS waveform...

Can somebody help in solving this problem?

Regards

 

[khouly]

try to use the corss coupled pair NMOS and PMOS as well , i think this will reduce the amplitude of the singal , to the leve that will n't damaged the gate

i think this happens to u coz the DC point is ur VDD and then the SINE wave swing arround it , so the peak mey be high

but if u used the PMOS and NMOS architecture the gate bias will be VDD/2 ,

khouly