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Validation of simulation with fabricated results by testing with Agilent's VNA

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I have completed design of my LNA at 2.1 and 4.6GHz. Thanks to edaboard members for your help.

Now I am checking port parameter(s11, s21, s22) with help of Agilent's VNA.
But i am not getting notches at desired frequencies.
s11 is better at 1.6GHz and s22 is better at 1.2 and 1.6GHz.

I have just designed a schematic in AWR's MWO with S parameter approach, replaced it with microstrip lines. No bias pad for transistor. And file sent to fabrication.
During design, bias circuit is always present there.

And is there requirement of bias for s11 and s22 measurements.

So, please sort out the things and suggest if any correction.


Thanks and regards.
 

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