Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Va modelling during synthesis in Sigexplorer

Status
Not open for further replies.

nikhil

Member level 1
Joined
Feb 23, 2005
Messages
32
Helped
4
Reputation
8
Reaction score
1
Trophy points
1,288
Activity points
1,537
can any one help me in find out the way for via modelling in sigxplorer of cadenec during pre synthesis

nikhil
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top