V-T Comparator offset test

[Patrick Yang]

Hi all,
I met a problem to test the offset of a V-T comparator, This kind of comparator converts the input difference voltage to time delay, now i wanna use Monte Carlo to test the offset of this comparator in ADE. I let the input voltage changing from -10mV to 10mV, and use the dc sweep to test the transition point of output voltage. However, due to time delay, i cannot plot the input vs. ultimate output level(i.e 0 or 1). Anyone can help me to sovle this problem. Thx in advance!

 

[kenambo]

i think the comparator hasn't had enough time to settle to the final output.... check output whether it can able to settle within 10mvto -10 mv range...

 

[Patrick Yang]

i think the comparator hasn't had enough time to settle to the final output.... check output whether it can able to settle within 10mvto -10 mv range...

I have simulated the circuit, the comparator can achieved high resolution and can settle with one clk time. because of the output delay, i.e 100ns or more after clk settled to 1, I cannot plot input vs. ultimate output status in cadence.

 

[keith1200rs]

It is a long time since I have looked at the offsets of clocked comparators but it takes multiple simulations just to find the exact switching point. That makes a Monte-Carlo analysis impractical by that method. The way I have done it in the past is

An estimation of the likely offset has been made by simulating for a DC sweep and looking at the current in the two input transistors

Maybe someone may have a better way.

Keith.

 

[Patrick Yang]

It is a long time since I have looked at the offsets of clocked comparators but it takes multiple simulations just to find the exact switching point. That makes a Monte-Carlo analysis impractical by that method. The way I have done it in the past is

Maybe someone may have a better way.

Keith.

But how can i estimate the offset by the current of two transistors? When many delay unit series togeter, how to estimate the offset using this method?

 

[keith1200rs]

You run a Monte-Carlo analysis and look for the point where the current in the two devices is equal. It will only be approximate - it will take account of Vt and some other mismatch parameters but will not account for speed differences between the two halves.

Keith.

- - - Updated - - -

The way to do it dynamically is to run a transient analysis with a slow ramp input and fast clock. You then need to find the clock pulse (or time) where the output changes state.

Keith.