Using BPSK with MAX2828 Transceiver IC

[general_pete]

Hi there,

I'm trying to make a prototype system for low bitrate transmission at 5.8 GHz using existing transceiver ICs, the problem being that many of those available (e.g. RFMD’s ML5800/ML5805, Atmel’s ATR2820, PHYCHIP’s PD5000) are either obsolete or soon to be obsolete.

I've found one from Maxim, the MAX2828 802.11a/b/g WLAN transceiver IC, it's typically used with a OFDM/DSSS baseband processor to encode the analog baseband I/Q signals for transmission and demodulate the received analog baseband I/Q signals. I was wondering if you think it is possible to just use a simple BPSK modulation scheme instead to provide the I/Q signals?

I was thinking that I could set the Q signal to 0, then use a digital bit stream input to a Schmitt trigger to give a NRZ signal which could be low-pass filtered to give the I signal for transmission. If I use a similar setup at the receive I/Q output, i.e. a low-pass filter, and theshold detector to reconstruct the original bit stream will I be able to demodulate the data ok do you think?

Any help would be much appreciated, thanks!

 

[general_pete]

I now realise that the carrier in receiver and transmitter need to be synchronised for BPSK demodulation, the MAX2828 IC basically (in its receive path) just downconverts the received RF signal to give the baseband I/Q outputs and leaves the job of synchronisation to the baseband processor. In OFDM for instance I think a preamble frame and blind estimation methods may be used to help correct any symbol timing/carrier frequency, phase/symbol clock offsets.

In my case, I'm not sure how to proceed if I want to implement BPSK, I know a Costas loop is one method of correcting carrier phase offsets and I do have access to the VCO tune port on the IC - the loop filter between charge pump output port and VCO tune input port in the PLL is external to the IC. Does anyone have any ideas on how I might easily implement this?

 

[jossion]

If you are looking for a commercial readymade solution for this band you may end up in using a WiFi chipset in the 5GHz band. The throuhgputs will be in the range of Mbps and ranges will be less than 100mts.

 

[general_pete]

I'd considered that but the problem is that it's more critical for us to be able to access the RSSI output than send large amounts of data through the link, most Wi-Fi chipsets will only sample the RSSI with 8 bits accuracy (in accordance with the 802.11 standard) which would only give 0.5 dB resolution of signal strength.

I've found an easier method of modulating the MAX2828 IC I think, it seems that with PSK there's no way of getting around the need for carrier recovery and carrier frequency/phase offset correction so I might try FSK instead; the TCXO is external to the IC and if I use a VCTXO I can just pull its frequency using the Vcontrol pin and non-coherently demodulate it at the output which should work ok with low bitrate I think.

 

[petervk]

How'd you go with this? I'm looking at that chipset myself and would prefer a simple modulation scheme.

 

[general_pete]

I ended up using FSK modulation, for the modulation I just applied the digital signal to be transmitted to a SPDT switch that switches between the voltage levels output from two digital potentiometers and then low-pass filtered the output (for pulse shaping) and applied it to the voltage control pin of a VCTCXO. The one I used allows frequency deviation of +/- 29 KHz, I'm still testing to determine the data rate I can get with it. I found another guy who'd also used the MAX2828 with FSK modulation for a transmitter on the FITSAT-1 satellite, you can see his system here - https://www.fit.ac.jp/~tanaka/FITSAT/FITSAT1TXBlock.pdf. He gets 115.2 kbps data rate and his VCTCXO allows +/- 50 KHz frequency deviation. I got the schematic from him also which I can send to you if you like. The thing to be careful of is how you connect the TX BBI/Q ports, I connected the + inputs to 3.3 V through a 1K resistor and the - inputs to gnd through a 1K resistor (as the FITSAT-1 design did also).

On the receive side I was initially using the XR-2211A FSK demodulatior IC with a 150 KHz IF, with the differential I/Q outputs from the MAX2828 first converted to single-ended signals, low pass filtered (with fc = 300 KHz) and then summed using a non-inverting summing amplifier. I was able to receive incoming RF FSK signals ok with this approach at data rates of > 50 kbps but I found that with such a low IF frequency the MAX28282 RSSI output was very noisy and for my application I'm interested in the RSSI.

I therefore redesigned the system to work with a higher IF of 10.7 MHz as there's plenty of crystal/ceramic filters and FSK demodulator ICs available that work at this frequency. I'm now taking the differential RX I/Q signals from the IC, passing them through the differential-single ended receiver, a 280 KHz bandwidth ceramic filter, summing them with a non-inverting amplifier (I used the THS3202D op amp for this, which has 2 GHz G-BW product and 9000 V/us slew rate), passing the summed signal through another few ceramic filters and then inputting them to the NXP SA636 FSK demodulator IC (just using the IF input here). This gives an RSSI output, with the output signal from the quadrature detector having to be put through a simple comparator to get back the data. You have to be careful with impedance matching with the higher IF frequency (I matched to 330 ohms throughout as this is the input/output impedance of the ceramic filters) and also with the layout, especially around the NXP IC to avoid instability as it has almost 100 dB of gain through it.

 

[petervk]

OK great, thanks for the update.

 

[mutcho]

hi?i am very much in designing a 5.8ghz a/v transmitter and its receiver(module) and eventually prototype it in my electronics project.i need your help in:
1.the schematics....i would appreciate you sending me the schmatics.can i find equivalent ics locally.i was intending to use awi 5800.its not locally available....any suggestions?