Hi,
If anybody has USB2.0 Hub Verilog or VHDL model, can u please share with me. I urgently need it for my university project.
thanbks in advance.
Regards,
- satya
I know the slave USB is available in www.opencores.org but not the Host.
I tried to find a free host at some point in the past and gave it up. I got one quoted for $65.000 (one-of license) or something like that, bloody expensive.
i'm not sure if it is right. why u need usb 2.0 model? if u r just running the digital simulation, ur circuits is not able identify the host is 2.0 or not. Use 1.1 is ok.