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USB 2.0 Implementation using Verilog

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atremp

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I think you should show more detailed information about this topic, for example: USB2.0 host controller? hub ? device controller or phy circuit.
 

omara007

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hi kumar_eee

there is some already designed USB 2.0 IP's for free on the internet .. I know that of ASICs.ws .. designed by Rudolf Usselmann .. he has a website for himself called : www.asics.ws .. and he is hosting the Verilog IP itself on opencores under this link :
http://www.opencores.org/projects.cgi/web/usb/overview

refer to this IP, maybe the documentation can be benfitial for u .. and the code too .. you need also to see the USB 2.0 standard document.

hope this helps
 

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