ls00722
Newbie level 3
Hi :
Assume I am designing an IC that will be in mass production, each chip will have a unique 32 bits ID. Apparently that has to be done by manuafacture, how will this be considered in RTL design phase? and how the manufacture will do it?
I only got experience on modeling an ROM, using case statement in Verilog. But since this will be an unique # for each chip. It can't be modeled using Verilog, so how do i incorporate this into my other logics in Verilog?
I am sorry if this is wrong place to post,and appreciate if you can direct me to the correct forum.
many Thanks!
chris
Assume I am designing an IC that will be in mass production, each chip will have a unique 32 bits ID. Apparently that has to be done by manuafacture, how will this be considered in RTL design phase? and how the manufacture will do it?
I only got experience on modeling an ROM, using case statement in Verilog. But since this will be an unique # for each chip. It can't be modeled using Verilog, so how do i incorporate this into my other logics in Verilog?
I am sorry if this is wrong place to post,and appreciate if you can direct me to the correct forum.
many Thanks!
chris