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Ultra low noise op-amp

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kishore2k4

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Hi guys,

The op-amp I am working on is used to sense changes in very small capacitance(femtofarads). To get a predefined sensitivity, the input capacitance of the op-amp is limited to 1pF. I tried the usual topologies like two-stage miller op-amp, folded cascode, telescopic cascode etc. For all the cases I am able to reach a noise level of around 40nV/sqrt(Hz) at 10kHz(The input signal is chopper stabilized at that frequency).

I tried optimizations within those topologies but am not able to make further progress. Is it even possible to reach sub-10nv/sqrt(Hz) with severely limited input MOSFET size in 0.35um process?

I've seen subthreshold designs but their input transistors are quite big. If I were to use that technique I have to reduce the current thereby sacrificing unity-gain bandwidth, which I don't want to do.

Any suggestions or ideas to try out? Thanks!
 

... Is it even possible to reach sub-10nv/sqrt(Hz) with severely limited input MOSFET size in 0.35um process?

J. H. Nielsen and E. Bruun, “A CMOS low-noise instrumentation amplifier using chopper modulation,” Analog Integrated Circuits and Signal Processing, vol. 42, pp. 65–76, Jan. 2005.

This paper describes a folded-cascode topology micropower CMOS chopper stabilized amplifier for biomedical application (nerve signals) produced in a 0.35µm process, which is said to exhibit an input referred thermal noise voltage of 7nV/√Hz - unfortunately the associated frequency isn't stated. Power consumption is given as 245µW at 1.8V .

Sorry I don't own this paper; just found it mentioned in Binkley's book David M. Binkley "Tradeoffs and Optimization in Analog CMOS Design", pp. 483 & 484 . Perhaps you can get hold of the paper.
 
Thank you for the reference, it's an interesting read. The chopper frequency is 20kHz. The paper is freely available at **broken link removed**
 
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    erikl

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