Hi guys,
The op-amp I am working on is used to sense changes in very small capacitance(femtofarads). To get a predefined sensitivity, the input capacitance of the op-amp is limited to 1pF. I tried the usual topologies like two-stage miller op-amp, folded cascode, telescopic cascode etc. For all the cases I am able to reach a noise level of around 40nV/sqrt(Hz) at 10kHz(The input signal is chopper stabilized at that frequency).
I tried optimizations within those topologies but am not able to make further progress. Is it even possible to reach sub-10nv/sqrt(Hz) with severely limited input MOSFET size in 0.35um process?
I've seen subthreshold designs but their input transistors are quite big. If I were to use that technique I have to reduce the current thereby sacrificing unity-gain bandwidth, which I don't want to do.
Any suggestions or ideas to try out? Thanks!