Uart BFM -- (Bus function module)

[karthik87]

Uart BFM -- (Bus function model)

Hi everyone

I want to prepare a uart BFM document and code for it, which consists of Tx and Rx

How to start with it.....wat are the registers required..?how many tasks are required....?do i require a state machine...?

and also if anyone has a reference document of BFM(APB or UART) ..,pl post it so that it would be helpful to prepare mine...

pl reply to thread as early as possible

Thanks in advance....

 

[ckshivaram]

check this
UART Verification IP
http://www.aldec.co.uk/Controls/Byt...type=application/pdf&name=UART_nVS.pdf&size=0

---------- Post added at 23:10 ---------- Previous post was at 23:09 ----------

A BFM is, like you said, a bus functional model. It usually connects to a Device Bus, like a CPU access port on a chip. A BFM could represent a bus interface and a protocol. A BFM could be THE CPU of the system, as in, a representation of the CPU in your chip. So in general a BFM interfaces to some aspect of the DUT, bus, input channel, CPU ... Also, the BFM interface to the DUT is usually timed or DUT signal dependent.

The BFM has one other aspect or interface and that is to the test environment. This interface is a NON-DUT interface and could take several different forms. ( function calls, input signals ...) The test environment interface may or may not be time dependent.

So, a BFM is a model of some aspect of your environment that is not part of the DUT. An environment may have many BFM's of different kinds, depending on what is needed to fully test your DUT. Creating BFM's enables the task of dividing your environment into manageable sized objects that have the potential to be reused in the future.

 

[karthik87]

can u give more detail on uart BFM,what are the tasks involved in it....pl explain in brief..?

 

[chipseller]

Hi Karthik. Here is Actel's BFM for their coreapb_UART (bfm_apbslaveext.vhd)

K

 

[chipseller]

Some of these files may be useful as well - K