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Most of the terms we use have some degree of ambiguity.
BFM is Bus Functional Model. All this means is that you have represented something with fidelity at the interface level. For example, for a CPU, it would represent the READ and WRITE operations the CPU does at its interface (such as AXI, Wishbone, or Avalon), but not internal code execution.
Where this term gets ambiguous is when it is applied to something. From a VHDL perspective, that something can be a procedure that implements READ and WRITE operations, or it could be an entity and architecture that receives abstract READ and WRITE requests through an abstract testbench interface and then implements proper interface signal wiggling on the respective DUT interface (again such as AXI, ...).
Pairing with BFM is FFM or Full Functional Model. This is a model that also implements some degree of fidelity of the design. As such a FFM of a CPU would be a code executing model - but while it may execute the code, there are degrees of fidelity with respect to timing (a multiply in an FFM may be done in 1 cycle where as the real device takes 4). RAM models are typically FFM as when you write to a location you need to read back the value from the same location.
VIP means Verification Intellectual Property. Like BFM, it too could be either a procedure or an entity and architecture.
I think the most clear term here is verification component (VC) - in VHDL at least, I have only heard that be applied to an entity and architecture.