Hi All,
I am trying to design a two-stage op-amp using 0.35um technology. I am currently lost on how to start my design. Our professor gave us a circuit which is 2 pmos diff pair as the input and based from that we start our design. Now my problem is how to estimate the transistor sizes. I am trying to check the voltages (vgs, vds) on all transistors but with no success. I tried to tie both p and n inputs to ground and check if my transistors are in saturation region and found out that my nmos current mirror and pmos current source are on saturation while my two pmos inputs are at linear. is that the correct state of my transistors?
Can you please give also some techniques on how to start my design. Specs requires 80db Gain/CMRR/PSRR, 100MHz Unity Gain BW, 3V Vdd and 0V Vss.
Thank you!