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TSMC Memory Compiler?

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rakko

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tsmc memory compiler

How do you create ram based memories in TSMC flow. Other ASIC vendors such as IBM/LSI have a memory compiler you run to create all needed memory models and sizes for you. How is this done with TSMC flow?
 

artisan memory compiler

if u d/l the artisan tsmc lib, u can do it. they come with ram and rom generator. but these only work in sparc and hpunix platform
 

memory compiler

what exactly is the name of ROM/RAM generator in artisan library? can you be more specific?
 

memory compiler artisan

rakko said:
what exactly is the name of ROM/RAM generator in artisan library? can you be more specific?


they're some separate files, not include in artisan lib.
 

tsmc memory generator

rakko said:
what exactly is the name of ROM/RAM generator in artisan library? can you be more specific?

you can browse artisan's web site (**broken link removed**)
to get more specific information about the memory compiler
 

artisan compiler

I think RAM generator can be found in Artisan lib, but ROM maybe not.
 

synopsys memory compiler

yes they do have rom generator. i used that before.

typically they have

dualport SRAM
single port sRAM
ROM
2-port register file

do a search in their product and u can find them
 

memory compiler tsmc

anyone have login info for artisan site? user/pass
 

artisan memory generator

Using @rt1s@n's (or v$t...) free lib or tools need your company signing NDA with @rt1s@n... you can NOT download those files by just clicking in their web... :(
 

tsmc sram

the tool is RapidCompiler, it can generate parametered RAM and ROM. it's not a free tools.
 

+artisan +memory +compiler +types

I used @rtls@n's memory compiler before. I remembered it generated .lib model and needed library compiler in synopsys to convert that into design compiler DB format...It needed Java support on the Unix machine...
 

register file tsmc

who can share the memory compiler for linux?
 

how to use memory compiler

niko_zhang said:
who can share the memory compiler for linux?

I suspect it was built on the Java platform, so if you install Java on your Linux, then
no problem running memory compiler...am I not right?
 

tsmc register file

Thanks. But it can't run on linux because it include some bin file for solaris.
 

artisan design compiler

Artisan provide memory compiler for TSMC.18 .15 .13 process.
SRAM, Register-file, high-speed, high-density.
I'm not sure are there ROM compiler.
 

artisan tsmc

kelvin_sg said:
I suspect it was built on the Java platform, so if you install Java on your Linux, then
no problem running memory compiler...am I not right?

Hi
The answer is unlikly negative.
The java part is for GUI Interface and swing support not for actual code generation. This part seems to be in native binary code for hpux and sparc.

You may try to find solution for migration from solaris sparc into solaris x86.

tnx
 

.18 memory compiler

kelvin_sg said:
niko_zhang said:
who can share the memory compiler for linux?

I suspect it was built on the Java platform, so if you install Java on your Linux, then
no problem running memory compiler...am I not right?

you are able to create those files in command mode, not evoking the GUI.
currently i'm trying to edit the runscript to see whether it can be work in linux w/o the gui.
 

tsmc memory

> How do you create ram based memories in TSMC flow.

You have 2 choices:

1) Make your own (study some VLSI and layout, then do your own layout)
2) Acquire a pre-designed/verified RAM-macro from an IP-vendor

There are several IP RAM/ROM vendors who target TSMC's foundry: Artisan Components, Dolphin Technologies, MoSys come to mind. Most TSMC customers use Artisan, because TSMC provides the Artisan design-kit at no (extra) charge -- all the customer has to do is sign an NDA and request the materials. Unless you have some special high-speed or high-density requirement (like e-DRAM or 1T-SRAM), then Artisan is good enough for you.

But you need to know exactly what you want. TSMC has many several different process-lines at each tech-node: general, low-power, high-performance, high-voltage, mixed-signal, etc. Each process-line has its own design-kit, and NO, the kits are not interchangeable.

For the "common" process-lines (CL013G, CL015G, CL018G, etc.), the complete Artisan kit has both RAM (1-port and 2-port) and ROM compilers. There are different types of ROM (diffusion, mask, poly), and availability depends on the process-line -- but every process-line has AT LEAST 1 ROM available.

Finally, a word of caution...If you just want to create a RAM or ROM of some size, and run it in your Verilog/VHDL functional simulation, then it's easy. You have nothing to worry about...But if you want to actually use the memory-macro to tapeout your chip, then there's a lot of work to go around. The Artisan memory-compiler has a lot of configuration options (top metal-layer#, power-ring width, etc.), and those are things your backend (layout) people need to answer. If you just pick any random#, you'll get a non-working tapeout...
 
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artisan sram model

nanako said:
kelvin_sg said:
niko_zhang said:
who can share the memory compiler for linux?

I suspect it was built on the Java platform, so if you install Java on your Linux, then
no problem running memory compiler...am I not right?

you are able to create those files in command mode, not evoking the GUI.
currently i'm trying to edit the runscript to see whether it can be work in linux w/o the gui.


Hi
It is a good news to hear from a member.
We all are now waiting for your results.
If you could run the sparc bin files, you will overcome the problem.

tnx
 

Re: artisan sram model

Hi i tried all the process, I could able to generate the model, but how to include that in your original design. I am trying this Ip for or1200 as found in open cores. Step by step procedures, Plz welcome. i am struck at this stage.

Regards
lohith@37.com
Lohi21
 

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