lokesh garg
Member level 5
i am simulating transmission gate in Hspice using following code....
vcbar 3 0 dc 0v
vc 2 0 dc 1v
vin 1 0 dc 0v
m1 4 2 1 0 N_10_SP w = 0.12u l = 0.08u
m2 1 3 4 2 P_10_SP w = 0.12u l = 0.08u
.lib "L90_SP10" cmos_models
.dc vin -2v 3v 0.001v
.plot dc v(4)
.option post
.probe
.end
i want this gate to be linear for valtages between -1v to 1v... but its not linear at -1v.... how can i get this range... plz help me. i am attaching the simulated output screenshot....
vcbar 3 0 dc 0v
vc 2 0 dc 1v
vin 1 0 dc 0v
m1 4 2 1 0 N_10_SP w = 0.12u l = 0.08u
m2 1 3 4 2 P_10_SP w = 0.12u l = 0.08u
.lib "L90_SP10" cmos_models
.dc vin -2v 3v 0.001v
.plot dc v(4)
.option post
.probe
.end
i want this gate to be linear for valtages between -1v to 1v... but its not linear at -1v.... how can i get this range... plz help me. i am attaching the simulated output screenshot....