Transistor sizing (W/L) in a digital circuit in analog and digital

[amsdesign]

For an analog CMOS circuit transistor W/L ratios are sized after deciding the current that flows through each branch. And after calculatiing unCox, Vgs

But for a digital circuit, say an inverter, there is no static current flow so is the standard method based on the switching loss equation?
P=Vdd^2*frequency of digital pulse* C0x W/L

 

[erikl]

Input stages usually use min. sizes, output stages' sizes are determined by their required drive capability (fanout). For single stage gates (inverters) you have to decide what's more important: low load or sufficient drive capability - if necessary, use 3 stages.