hjzs18
Junior Member level 3
error unable mcml
HI, all:
I am now studying MCML logic , and since the threshold voltage of the diff pair may impair the porformance of the the logic, i want to reduce the effect by using the topology below, i simulated this circuit and found it is really better than the one without using the two feedback transistors, but as i am not unable to reduce what is happening there, i think maybe you can help me find the transfer function of this circuit. i know MCML is kind of digital thing, but i think i can get a better understanding of this , so i post it here
thanks a lot
HI, all:
I am now studying MCML logic , and since the threshold voltage of the diff pair may impair the porformance of the the logic, i want to reduce the effect by using the topology below, i simulated this circuit and found it is really better than the one without using the two feedback transistors, but as i am not unable to reduce what is happening there, i think maybe you can help me find the transfer function of this circuit. i know MCML is kind of digital thing, but i think i can get a better understanding of this , so i post it here
thanks a lot