Tracking A/D converter

[zionico90]

Hi guys,

i should design a tracking A/D converter based on R-2R ladder network driven by CD4029 digital counter; the analog input range must span from 0V up to +5V.
I have already design the DAC but I have still some problem with the whole circuit. The circuit basically includes:

- DAC Block: 2-2R ladder network+inverting amplifier to obtain the dynamic range 0-5V
- Comparator Block by using a simple op-amp
- Digital counter

The LTSpice circuit schematic is in annex.



Why the circuit is not working? I have the impression that some connections is wrong. Moreover, I would like to know where I have to physically do the check in order to verify how the ADC follows a sinusoidal analog input.

Thank you for your help hoping that this section is correct!
Marco

 

[FvM]

The circuit can surely not "work" because it's incomplete (missing resistor values and OP power supply), unreasonable simulation time duration.

If you are unsure about the circuit parameters, try tracking a slow varying input voltage. You should also consider that the circuit can only track a voltage inside the DAC range, surely not a bipolar sine. Rethink the test setup.

 

[erikl]

Moreover, the

2-2R ladder network

... isn't correct: resistors R5/7/9/11 & R12 should have the value 2R (that's where its name comes from ;-)), s. e.g. this Wiki explanation.

 

[crutschow]

Post the LTspice .asc file as a .txt file.

 

[zionico90]

Thanks guys for your answers. The circuit was just an idea and so didn't include resistor values but you are right, it is better to speak looking at the complete circuit below. I attach also the asc file.

**broken link removed**


Thank you very much for your help!

 

[crutschow]

Here is you circuit modified to work.
I didn't try to optimize it, just changed it enough so that it was working.

The voltages were changed and the comparator negative voltage was connected to common so that the comparator output is compatible with the CMOS 0-5V input.
The clock frequency and simulation time were changed to be compatible with the 100Hz signal frequency (the circuit can't operate with only 1 clock pulse per analog signal cycle).
The gain of U2 was reduced slightly so that all four bits are used for better resolution of the digital output.

 

[zionico90]

Thank you very much for the help!
I have a last question: are the transimpedance and the inverting amplifier connected to the R-2R ladder network necessary in this circuit? I saw a circuit in which the output of the R-2R was directly connected to the comparator.

Thanks!

 

[FvM]

R-2R ladder can be operated with voltage output.