Thin oxide layer on CMOS chips??

[jgrant3]

Hi All.

Yesterday a colleague told me a thin oxide layer is present on his CMOS chip. I always thought the final passivation layer of any CMOS chip was Silicon nitride however this colleague says that a thin layer of oxide grows on top of this Nitride layer. Can anyone on the EDA board verify his claims?

This fact is very important to my colleague you see as he has an ISFET chip and the oxide on top of his silicon nitride interferes with his sensing sensitivity.

Many thanks,

James

 

[electronrancher]

Are you talking about the protective covering on the top of the chip, or talking about the gate oxide used in the transistors.

Assuming you're talking about the top protective covering: I agree - Usually, they use an oxide-nitride stack. But oxide is on the bottom (touching top metal), then nitride is used as the topglass to protect the IC surface. Nitride is much harder so it is usually on top.

You can remove both layers by using "PAD" mask - that's the layer used to cut the topglass for attaching bondpads.

I don't know about removing oxide but leaving nitride - the step would be so big that the nitride would not get good coverage. It probably "sticks" better to oxide than to metal, etc.