Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

CMOS-C Filter before amplifier

Junus2012

Advanced Member level 5
Joined
Jan 9, 2012
Messages
1,552
Helped
47
Reputation
98
Reaction score
53
Trophy points
1,328
Location
Italy
Activity points
15,235
Hello,

I have a large differential sensor signal of 0.5 Vp-p. I use an ADC of 14 bits with full-scale voltage of 2 Vp-p. Therefore I set the gain of the instrumentation amplifier (In-Amp) to 4 to utilize the full dynamic range of the ADC and thus achieving the highest resolution of 14 bits.

After the In-Amp I use CMOS-C filter. However, now the input to the filter becomes 2 Vp-p, and because it relies on MOS resistor, such amplitude starts to introduce non-linear distortion at this amplitude.

I am thinking to put the filter before the In-Amp, but I face a technical problem with regards to the input common mode range between the filter and the sensor bridge. The alternative possible solution is to place a unity gain In-amp before the filter then I another in-amp with gain 4 after the filter.

I believe that a common approach is to always keep the filter in the last stage, otherwise the amplifier beyond it will amplify the noise level as well depending on its gain value.

I would like to have your discussion on this issue

Thank you in advance

Best Regards
 
For some reasons I don't know why my records has been removed from my profile, any way that is not important as the answer to my post :D
 

LaTeX Commands Quick-Menu:

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top