The relation between an ADC's Sample-rate, Bandwidth and it's S/H Speed

[naalald]

When they say, for example, a 125 MSps ADC with 2.2 GHz analog bandwidth:
1- This is called undersampling (or sometimes IF sampling), right?
2- What should the speed (the maximum clock frequency) of the input S/H be?

 

[jjx]

1) Not necessarily, there could be other reasons for wanting a very high input bandwidth. The application could be very sensitive to attenuation in passbands, group/phase delay, etc., which would be affected by a bandwidth limitation. Now, in this case, 2.2 GHz is quite much higher than 125 MSps and I suppose they hint that the ADC can be used for subsampling (undersampling?).

2) 125 MHz in terms of switching speed, but settling time for components inside the S/H obviously has to track the 2.2 GHz bandwidth without distorting the signal.