Where did u get this statement?
Somehow I don't think absolutely PMOS is more robust than NMOS. I used NMOS only ESD struture in some of my IO designs and it works for over 8kV HBM, so your statement is not always rite, maybe in some particular situation.
What i predict is PMOS is more uniform in current flow, not likely to have current crowding at one spot as PMOS mobility is a lot slower than NMOS, not easily to jam current at one locatio.
What i predict is PMOS is more uniform in current flow, not likely to have current crowding at one spot as PMOS mobility is a lot slower than NMOS, not easily to jam current at one locatio.
I think (ii) is more reasonable, as I assume we've got same size as NMOS and PMOS. If the sizes are already different, it's not fair to make comparison.
However, when it comes to a triple WELL process, (ii) is not existed as well. So this statement as far as I concern, may not be always correct in every process technologies. It depends on case by case