Beginning to order the hardware in for my FPGA project. Basically an fpga is going to control an ADC, DAc and external memory to sample audio signals. My problem comes when ive just looked at a datasheet of the ADC i was going to use and noticed the analogue input goes from 0V to 3.3V.
Now since this is audio i have it in my head that it should be bipolar but now i am not so sure. does audio need to contain the negative part or can it be offset to 0 - 3.3V rather than -3.3V to +3.3V.
Also i was wondering can you hear -ve analogue voltage through a speaker?
You need to look at data spec for your ADC, and look at the appnotes, it usually show how to hook ADC.
sometimes you might need 5V for analog section, but always try to separate digital power and analog
Also you are not be able to hear -VE, since it DC, and audio it combination of sine waves
Try offsetting your ADC input to +1.65V (one half of 3.3V) by installing a simple resistor voltage divider and a DC blocking capacitor. That should make your ADC input happy. Beware, that technique may couple noise from the 3.3V line into the ADC input.
Well, suitability means different things to different people. For some designers, it's worth the nuisance of having to offset the voltage, because the system would need only one power supply instead of two.