The ADC analog input issue

[LONGGANG]

Hi, I am new to the ADC application. I am using the ADC LTC2314-14 for testing DC inputs and AC inputs.

The outside circuit is shown in the figure. For the SPI protocol, there are no issues inside the communication. The FPGA can read the correct SDO from the ADC, the SCK is 1MHZ which is also not high to cause some delay issues.

The problem right now is that the potential stray capacitance between Ain and VDD. I have tested two same ADC and got the same results. When the analog input is a sin wave at 10HZ, the ADC shows a result with a constant gain 0.99. (For instance, sin changes from 0V to 1V. The ADC will give a result 0V to 0.99V). This gain ratio is not ideal but it is fixed during the whole sin period. So I can compensate for this by myself.

If the input is a DC voltage, the ADC results show different gain corresponding to different inputs. (For instance: for a 1.8V DC input, the ADC gave 1.782V outputs. But for a 0.5V DC input, the ADC will give 0.480V ) The gains are 0.99 and 0.96 respectively. This is impossible for a 14bits ADC with a maximum offset error around 4mV. During the test, the gain range will shrink from a high DC input (1.8V) to a low DC input (0.5V)(exp. : gains become 0.99 and 0.98) with a 20nF capacitor connecting from Ain () to the ground. But this gain range will shrink to a constant and cannot be decreased with a higher bypassing capacitor （From Ain to GND）anymore. ：-（

In this case, I cannot only use this ADC for AC inputs by compensating for a constant gain. For DC inputs, I totally have no ideas about that. (DC should be super simple but it beat me )

Has anyone encountered the same problem or have good suggestions? Thank you very much!

BR，
LONGGANG

 

[d123]

Hi,

I haven't looked at the ADC datasheet. What happens if you use an op amp voltage follower to buffer the AC and DC signals into A_in?

 

[LONGGANG]

Hi,

I haven't looked at the ADC datasheet. What happens if you use an op amp voltage follower to buffer the AC and DC signals into A_in?

Hi,

I used a signal generator with 50ohm output impedance connecting with A_in. And for A_in I used both a multimeter and an ocliliscope to read the DC input value as references. A_in input impedance is around 1.3Mohm measured by a multimeter.

BR,
LONGGANG

 

[KlausST]

Hi,

you stricktly followed the PCB design and bypassing recommendations?
True GND plane with very short traces, especially for VRef?

Best if you show us your PCB layout.

Also show how you measured the values. Signal generator, voltmeter, wiring....

Klaus

 

[LONGGANG]

Hi,

you stricktly followed the PCB design and bypassing recommendations?
True GND plane with very short traces, especially for VRef?

Best if you show us your PCB layout.

Also show how you measured the values. Signal generator, voltmeter, wiring....

Klaus

Hi,

Thanks for replying. The ADC right now is not built in a PCB but a breadboard for fast testing like that: This circuit followed the bypassing recommendations in the datasheet. For the ground traces, I thought this will not affect DC voltage inputs. The references are measured by both a good multimeter (Type: fluke 289) and a good oscilloscope (4Gsps).

BR,
LONGGANG

 

[KlausST]

Hi,

Forget a breadboard for applications like this. They just bring more problems, counfusions, but no benefit.
Use a breadbord for more simple, low speed low current applications.

If you don't follow the datasheet recommendations you will not get expected performance.

Klaus

--- Updated Nov 18, 2020 ---

...
I recommend to read some good application notes on how to get good ADC performance.

There is a good reason why the datasheet tells how to install capacitors and how to design the PCB layout.

In your case I assume the capacitor from VRef to GND degrades the performance. A badly installed VRef capacitor will lead to increased DNL, especially when many bits are switching. 0x07FF to 0x0800 for example.

Klaus

 

[LONGGANG]

Hi,

Forget a breadboard for applications like this. They just bring more problems, counfusions, but no benefit.
Use a breadbord for more simple, low speed low current applications.

If you don't follow the datasheet recommendations you will not get expected performance.

Klaus

--- Updated Nov 18, 2020 ---

...
I recommend to read some good application notes on how to get good ADC performance.

There is a good reason why the datasheet tells how to install capacitors and how to design the PCB layout.

In your case I assume the capacitor from VRef to GND degrades the performance. A badly installed VRef capacitor will lead to increased DNL, especially when many bits are switching. 0x07FF to 0x0800 for example.

Klaus

Hi,

Thanks for the good suggestions!! I will do a PCB design for it following recommendations carefully and test it further. Once I got some results, I will post them here.

BR,
LONGGANG

 

[crutschow]

I used a signal generator with 50ohm output impedance connecting with A_in.

The signal generator ground should be connected directly to the ADC GND input.
Was it?

 

[stenzer]

Hi,

something what is usually pretty usefull to check the ADC performance (and layout) for DC signals is to use a battery i.e. a AA battery with a voltage of 1.5 V. How have you provided the DC signal so far?

You might also use a small prefboard which houses your breakout-board (ADC) to reduce the wire lenght, and connect this prefboard at an angle of 90° to your FPGA board.

Regarding breadboards and high frequencies this video might be of interest.

BR

 

[LONGGANG]

The signal generator ground should be connected directly to the ADC GND input.
Was it?

Hi,

Thanks for replying. The signal generator connected to the ADC GND directly in my test.

BR,
LONGGANG

 

[LONGGANG]

Hi,

something what is usually pretty usefull to check the ADC performance (and layout) for DC signals is to use a battery i.e. a AA battery with a voltage of 1.5 V. How have you provided the DC signal so far?

You might also use a small prefboard which houses your breakout-board (ADC) to reduce the wire lenght, and connect this prefboard at an angle of 90° to your FPGA board.

Regarding breadboards and high frequencies this video might be of interest.

BR

Hi stenzer,

Thanks for replying. I used both a 1.6 V battery and a signal generator to create DC inputs. They showed the same results. And I checked the FPGA three GPIOs by the ILA. There is no data lost during ADC and FPGA communication with 1 MHZ tsck (The first row is CS. The second row is clk (rising edge read SDO). The third row is SDO from ADC.The last result has one circle latency.). So, I think the issues are from the analog part.
For the breadboard, I will look into a small preboard to check. This is good to know that!

BR,
LONGGANG

 

[KlausST]

Hi,

some comments:
Even a good oscilloscope has not necessary good enough "DC accuracy performance" to test a 14 bit ADC.
You really need to read (and post) accordig scope soecifications.
The same applies to the signal generator.

When you show a photo about a (measurement) problem, then show it with all equippment connected like in the test.

I recommend to use ceramics capacitors for bypassing DC signals (power supply, VRef...), but use foil capacitors on AC signals (not to degrade THD).

Klaus

 

[stenzer]

Hi,

as @KlausST already recommended use ceramic capacitors. Have a closer look at the datasheet on page 8, where the use of (low ESR) ceramic capacitors is recommended as well.

BR

 

[LONGGANG]

Hi,

some comments:
Even a good oscilloscope has not necessary good enough "DC accuracy performance" to test a 14 bit ADC.
You really need to read (and post) accordig scope soecifications.
The same applies to the signal generator.

When you show a photo about a (measurement) problem, then show it with all equippment connected like in the test.

I recommend to use ceramics capacitors for bypassing DC signals (power supply, VRef...), but use foil capacitors on AC signals (not to degrade THD).

Klaus

Hi Klaus,

Thanks for replying. Your comments helped me a lot! I tested today and got some results in accordance with your inference. Frist the oscilloscope I used only has 20mv minimum detecting gap. And when the input voltage is low (100mv), the waveform displaying on the screen will have around 10mv bias compared with a high voltage input. This bad reference let me believe the ADC having a 0.99 attenuation gain inside it. But it seems like the ADC is a trust one instead of the oscilloscope in the AC testing!! But I maybe need to find another more accurate measurement tool to test it further, since right now the error of the ADC is bound to 20mv which is the Oscilloscope error.

The unit of the y-axis is V. The Ethernet in the figure means data from the ADC.


Maybe using another 14 bits or 16bits evaluation ADC boards are a good cooperative way to compare with this ADC?

Unfortunately, the ADC (1.582V) still showed a big difference (0.18V) with a 1.598 V battery DC input. But it is good to know that film capacitors work for AC and ceramic capacitors work for both AC and DC in this ADC design. I will buy ceramic capacitors and test it! Hope it works!

BR,
LONGGANG

--- Updated Nov 19, 2020 ---

Hi,

as @KlausST already recommended use ceramic capacitors. Have a closer look at the datasheet on page 8, where the use of (low ESR) ceramic capacitors is recommended as well.

BR

Hi stenzer,

I will replace those film capacitors with ceramic capacitors in my layout and try again.

And I am happy to know my ADC on the breadboard works at 1MHZ with AC inputs. Although DC inputs are still wrong, the frequency problem has not appeared with the AC side.

BR,
LONGGANG

 

[KlausST]

But it is good to know that film capacitors work for AC and ceramic capacitors work for both AC and DC in this ADC design. I will buy ceramic capacitors and test it! Hope it works!

Please re read post #12

Klaus