erikl , Thanks for reply........ i had read the paper you mentioned above . But this paper do not explain all steps clearly. I followed steps mentioned in Razavi book Page hNo.300 for Vdd=1.8v and UMC=0.18um. for the Sizes and Bias voltages that i got do not satisfy to make all the transistors in saturation..it is like a mission.....how much one would tweak the design...if i do then i loss my current and all other specifications........what sud i do...is there any thesis or article which may explain all steps clearly..