yes, interconnect corners also matter. OCV is applied as a derate factor, it does not become a corner per se.
in summary, you have PVT corners for transistors, corners for the interconnect, and functional corners. it's usual to have 4+ for the first, 4+ for the second, 10+ for the latter. it's not hard to reach 80 scenarios for a large SoC. and that is fine, the tools don't do the same work 80 times. they understand some corners dominate others and will ignore a lot of them during design implementation phases.