Feb 8, 2014 #1 E ebuddy Full Member level 3 Joined May 15, 2007 Messages 177 Helped 35 Reputation 70 Reaction score 34 Trophy points 1,308 Activity points 2,372 I defined a fifo interface: Code Verilog - [expand]1 2 3 4 5 6 7 8 9 10 interface fifoint (); logic clk; logic rstn; logic [3:0] cin; logic [3:0] cout; modport dut (input clk, rstn, cin, output cout); modport tb (input clk, rstn, cout, input cin); endinterface And my DUT looks like this: Code Verilog - [expand]1 2 3 module fifo (input clk, rstn, input [3:0] cin, output reg [3:0] cout); ..... endmodule So when I am trying to connect dut in the testbench, I will do this: Code Verilog - [expand]1 2 3 4 5 6 7 8 9 10 11 12 13 14 module t_fifo (); fifoint mfifoint(); tp i_tp(mfifoint.tb); fifo dut ( .clk (mfifoint.dut.clk), .rstn (mfifoint.dut.rstn), .cin (mfifoint.dut.cin), .cout (mfifoint.dut.cout) ); endmodule Modelsim just complains that "A modport ('dut') should not be used in a hierarchical path" What is other way to write this and avoid any warnings? Last edited by a moderator: Feb 8, 2014
I defined a fifo interface: Code Verilog - [expand]1 2 3 4 5 6 7 8 9 10 interface fifoint (); logic clk; logic rstn; logic [3:0] cin; logic [3:0] cout; modport dut (input clk, rstn, cin, output cout); modport tb (input clk, rstn, cout, input cin); endinterface And my DUT looks like this: Code Verilog - [expand]1 2 3 module fifo (input clk, rstn, input [3:0] cin, output reg [3:0] cout); ..... endmodule So when I am trying to connect dut in the testbench, I will do this: Code Verilog - [expand]1 2 3 4 5 6 7 8 9 10 11 12 13 14 module t_fifo (); fifoint mfifoint(); tp i_tp(mfifoint.tb); fifo dut ( .clk (mfifoint.dut.clk), .rstn (mfifoint.dut.rstn), .cin (mfifoint.dut.cin), .cout (mfifoint.dut.cout) ); endmodule Modelsim just complains that "A modport ('dut') should not be used in a hierarchical path" What is other way to write this and avoid any warnings?
Feb 9, 2014 #2 D dave_59 Advanced Member level 3 Joined Dec 15, 2011 Messages 841 Helped 366 Reputation 736 Reaction score 360 Trophy points 1,353 Location Fremont, CA, USA Activity points 7,390 Modports are only used in interface port and virtual interface declarations. They are not used to reference individual interface items. A hierarchical reference into an interface instance works the same as a hierarchical reference to a module instance. So just write Code: fifo dut ( .clk (mfifoint.clk), .rstn (mfifoint.rstn), .cin (mfifoint.cin), .cout (mfifoint.cout) );
Modports are only used in interface port and virtual interface declarations. They are not used to reference individual interface items. A hierarchical reference into an interface instance works the same as a hierarchical reference to a module instance. So just write Code: fifo dut ( .clk (mfifoint.clk), .rstn (mfifoint.rstn), .cin (mfifoint.cin), .cout (mfifoint.cout) );