systemverilog synthesis for spartan 3e devices

[akipro]

Hey, as xilinx ISE doesn't support systemverilog and vivado only suppports 7th and higher generation devices, is there a way to synthesize systemverilog file for spartan 3e device? Are there any third party tools which can do this ? If so please specify.

Thanks

 

[jbeniston]

Synplify Pro?