mundravale
Newbie level 2
verilog bind
Hi,
I was looking for function coverage support in my existing verilog testbench. One way to achieve this is using System verilog coverage constructs. I was wondering if I can write SV coverage constructs under SV program /module and integrate this module inside verilog testbench. Will it work? For SV constructs to be implemented, do we need to have top testbench in SV or verilog 2k will do?
Thanks & Rgds
Dhananjay
Hi,
I was looking for function coverage support in my existing verilog testbench. One way to achieve this is using System verilog coverage constructs. I was wondering if I can write SV coverage constructs under SV program /module and integrate this module inside verilog testbench. Will it work? For SV constructs to be implemented, do we need to have top testbench in SV or verilog 2k will do?
Thanks & Rgds
Dhananjay