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[SOLVED] systemverilog loop question: incrementing more than one

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BartlebyScrivener

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This might seem ridiculous but ...

for (int i=0; i<100; i+10) begin
// code
end

will that give me i=10, i=20, i=30, ... i=100 or is there a different way of doing it? I have only ever had i++ on the right!

Thanks.

- - - Updated - - -

Also, say I had a loop

for (int i=0; i<5; i+10)
// code
end

would that only perform the code for i=0?

- - - Updated - - -

I found an online simulator to play http://iverilog.com/index.php
 

Basically right, but i+10 isn't a legal for step expression, write i+=10 instead.

Review clause 12.7 in Systemverilog LRM
for_step_assignment ::=
operator_assignment
| inc_or_dec_expression
| function_subroutine_call
 
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