Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

synthesizer and Lo design

Status
Not open for further replies.

zxl13

Junior Member level 2
Joined
Jul 8, 2002
Messages
22
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
120
any one can give me some advice on synthesizer use.
If a synthesizer used at 3GHZ and Phase noise at 10khz is better than -95dB/hz?
Or a fractional synthesizer should be used?
 

You could buy one. If you are unfamiliar with synthesizer design, that phase noise may be elusive, since any noise source in your design could violate the spec.

If you want design help, we will need to know the exact frequency range, the frequency step size, the level of spurious outputs desired in dBc, and the settling time required.

If you already have a reference clock (crystal oscillator) that you want to use, we will need to know its frequency and phase noise.
 

Do you need to step the synthesizer frequency or is it fixed at 3GHz? You can achieve this phase noise number with an integer N if the step size (reference frequency) is large enough. Otherwise, a fractional N is needed. Tell me the step size you require and I can give you guidance.
 

-95dBc@10kHz offset is quite good Phase Noise at 3GHz...
 

Maybe, Maybe not. It all depends on the N and the reference's phase noise. If N=100, like falling off a log. If N=27,330 1/3, then good luck!
 

may be using sampling phase detector will gain better phase noise if you need just fixed frequency
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top