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CST and/or HFSS software to design LPDA

A

alftel

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Hello guys (and gals),

I wonder what it will take money wise to task any of you who owns or have an access to licensed CST and HFSS software to design, simulate/adjust Log Periodic Dipole Array (LPDA) antenna based on our specification, such as maximum size, Err and frequency range. We can provide a preliminary "good guess" measurements to start from. Teflon material, 1.52mm, rated to 10 GHz, 1oz ENIG finishing. Please ping me in private to alex@alftel.com

Cheers,
Alex
 
Solution
A
I know this article (the one that you did show picture from) - we attempted to replicate this design in a past in order to see if it does work. I can tell you right now that design as it explained in this article just does not work and there is no way it would demonstrate S11 and SWR as claimed in this article. I think bowtie dipoles that supposed to help to "cover" lower end need to be a "normal" printed bowtie style - i.e. solid triangles. This is why we do need a solid simulation to begin with, size allowance should be sufficient
--- Updated ---

This is what we did in a past - 300-8000 MHz LPDA crafted with FR4, 1.6mm substrate. We usually follow our good friend Kent Britain advice posted here...
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It should be designed with 250 MHz - 10 GHz coverage, possible use of bowtie dipoles as last elements to minimize size.
 
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Using a Bow-tie element in a LPD antenna doesn't help reducing the size of the structure, because bow-tie length (between its extremities) is still λ/2 as in a normal half-wave dipole.
But the bow-tie element will improve the LPD efficiency at lower frequencies.
 

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  • bow-tie lpd.jpg
    bow-tie lpd.jpg
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I know this article (the one that you did show picture from) - we attempted to replicate this design in a past in order to see if it does work. I can tell you right now that design as it explained in this article just does not work and there is no way it would demonstrate S11 and SWR as claimed in this article. I think bowtie dipoles that supposed to help to "cover" lower end need to be a "normal" printed bowtie style - i.e. solid triangles. This is why we do need a solid simulation to begin with, size allowance should be sufficient
--- Updated ---

This is what we did in a past - 300-8000 MHz LPDA crafted with FR4, 1.6mm substrate. We usually follow our good friend Kent Britain advice posted here: https://www.wa5vjb.com/references/DesigningPCB-LPs.pdf and while it is an "approximate" approach it does require a number of tries with adjustments etc. etc. Teflon material is expensive, so we would like to start with well done simulation first in order to minimize adjustments efforts.

1699376853267.png
 
Last edited:
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Solution
You are right, the bow-tie elements should be solid triangles, due to the surface currents distribution.
 
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