It looks like you simply need a UART receiver, so you don't need precise synchronization. The common technique is to somehow generate a clock (usually by dividing down a crystal oscillator) that runs 16 times faster than the bit rate. Now design some counter logic that waits for the beginning of the start bit, then delays 8 clocks (the middle of the start bit), and then begins sampling the data bits every 16 clocks thereafter until you've sampled all 11 bits. Then check to see if the 11 bits make sense (start=0, stop=1, parity=whatever).
The values 16 and 8 are mostly arbitrary. For example, you could choose 10 and 5 if that's more convenient for you.