Switching activity factor in cmos

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Manuv16589

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Hi there,
The dynamic power dissipation in a Cmos circuit is given by
P=a*C*Vdd(square)*f
where a is the switching activity factor which is the probability of output switching from 0 to 1. Can somebody give more details? It would be more precise if you could explain with an example. Thanks in advance
 

Various block/gates from an IC may have different switching probability over time. For example, clock generator have a=1, mean switch all time, a counter (part of counter) may have switchs (transitions) at 1/10 from clock or 1/100, so a=0.1 or 0.01 respectively. In such way knowing working mode for each gate, know a, so may calculate power disipation for an IC or other device.
 

Thanks iop95
Can u explain switching factor taking 2 input and gate as an example so that it will more clear to me
 

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