joe2moon said:Nangate Cell Compiler (h**p://www.nangate.com/index.php?option=com_content&task=view&id=38&Itemid=58)
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Compiling the optimal set of individually optimized cells for a given design or functional block, the target design is optimized in terms of power, performance and area.
Features:
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- 1) Rich set of CMOS logic cell generators with programmable drive strengths:
-- Buffers (inverting, non-inverting, clock)
-- Boolean combinatorial (AND, OR, NAND, NOR, AOI, OAI, OA, AO, MUX)
-- User-defined complex gate based on equation input
-- Arithmetic (XOR, XNOR, full-adder, half-adder)
-- Sequential (Lath, clock-gater, D-flip/flop with any optional combination of scan, set and reset)
-- Miscellaneous (tie cells, filler cells, antenna)
- 2) Fully automated layout topology generation using advanced genetic optimization algorithms that minimize cell area and parasitic effects. Optimization strategies include:
-- Optimal cell input sequencing
-- Optimal diffusion strip layout
- 3) Transistor netlist synthesis with built-in transistor sizing algorithms and override options
- 4) User-definable topology generators with support of advanced parameterized set of layout primitives:
-- Contact and contact arrays
-- Single, L-shaped and folded transistor configurations
- 5) Advanced proprietary compaction engine
-- Adaptive topology-driven compaction strategies
-- Full design rule support for advanced CMOS processes
- 6) Circuit and layout verification
-- Built-in formal verification of circuit and layout vs. specification
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Nangate Cell Characterizer (h**p://www.nangate.com/index.php?option=com_content&task=view&id=36&Itemid=56)
Features:
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- 1) Spice simulations through Nangate Library Manager controls
- 2) Built-in extraction
- 3) Automatic Spice deck generation
-- Built-in Spice simulator as well as interface to customer's industry-standard Spice simulators
-- Support for results correlation reporting
- 4) Accurate input state-dependant characterization of cell parameters as function of cell load and input transition time:
-- Timing: propagation delay, output transition time, setup/hold, recovery, pulse width, no-change time
-- Power: cell internal static and dynamic power
-- Input capacitance
-5 ) Utilizes nonlinear device model for delay and internal power models using two-dimensional lookup tables
-6 ) Built-in extensive stimulus, results and model validation
-7 ) Shared database model with Nangate Library Manager and Nangate Cell Compiler tools for seamless interface
- 8) Alternative input format options include GDSII or Spice circuit netlists
-9) Flexible datasheet generator
- 10) Intuitive GUI with wizard and extensive configuration options for characterization parameters as well as graphical progress monitoring
- 11) Full batch mode support
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