Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

stacking of devices in 9 track library

Status
Not open for further replies.

Somashekhar

Member level 2
Joined
Jan 4, 2010
Messages
47
Helped
9
Reputation
18
Reaction score
8
Trophy points
1,288
Location
India
Activity points
1,538
Hi all,

What is the disadvantage of stacking of devices in standard cells..?
 

Salam
Do you mean that stacking transistors in a cell like NAND for more inputs?

No..
Below sqaure is Nwell.. And inside shape is moat.. What is the disadvantage of putting moat this way..? I mean two PMOS one below other..
__________________________________________
| _________ |
| |______ | |
| ______| | |
| |_________| |
|__________________________________________ |
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top