Specify Block and Sdf file annotation

[sunidrak]

hi,

If i have library.v file containing D flip flop and other digital elements without specify block for delay then is it possible to do timing simulation using sdf file. Is specify block is mandatory to use sdf file for timing simulation, without specify block it is not possible ??

Regards
Sunil

 

[sharath666]

An SDF file does not specify delays experienced by individual elements like flops and gates (only interconnect delays). So SDF simulation is anyway possible whether the library.v file consists of specify blocks or not. If it consists of specify blocks then the delays for that module will be considered else it will be not.

 

[dave_59]

A specify block is just one of many ways of modeling timing behavior using path (or pin-to-pin) delays. You can also model timing by putting delays on the outputs of individual elements, through ports of a module, through wires (interconnect), or any combination of these delays. An SDF file can annotate any of these delays, but it can't annotate path delays without a specify block already in the model. A specify block is also the only place where timing checks like setup and hold can be written. So without specify blocks, your timing simulation cannot perform any of those checks. That might be OK if you are using another tool, like static timing analysis, with a different library to perform those checks.